mmDCP0_DVMM_PTE_CONTROL 3028 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP0_DVMM_PTE_CONTROL                                                 0x1a8a
mmDCP0_DVMM_PTE_CONTROL 4266 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP0_DVMM_PTE_CONTROL                                                 0x1a8a
mmDCP0_DVMM_PTE_CONTROL 3746 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP0_DVMM_PTE_CONTROL                                                                        0x05d0