mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 1718 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                              0x48e4
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 1556 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                              0x48e4
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 1663 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                              0x4964
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 12546 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                                                     0x220a
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 11175 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                                                     0x2a04
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 13024 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4                                                     0x2a04