mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 1766 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                             0x48ea
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 1616 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                             0x48ea
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 1717 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                             0x496a
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 12558 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                                                    0x2210
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 11187 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                                                    0x2a0a
mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 13036 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10                                                    0x2a0a