mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX 2133 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX                                                       2
mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX 1723 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX                                                       2
mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX 1685 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_STATUS_BASE_IDX                                                       2