mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX 2131 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX                                                         2
mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX 1721 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX                                                         2
mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX 1683 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCHUBBUB_SDPIF_MEM_PWR_CTRL_BASE_IDX                                                         2