mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX 2243 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX                                                          2
mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX 1851 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX                                                          2
mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX 1799 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCHUBBUB_GLOBAL_TIMER_CNTL_BASE_IDX                                                          2