mmDCFEV0_DCFEV_DMIFV_MEM_PWR_STATUS 8633 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCFEV0_DCFEV_DMIFV_MEM_PWR_STATUS                                     0x46f9
mmDCFEV0_DCFEV_DMIFV_MEM_PWR_STATUS 8634 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCFEV0_DCFEV_DMIFV_MEM_PWR_STATUS                                                            0x1283