mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX  663 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX                                                         1
mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX  311 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX                                                         1
mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX  301 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_VSYNC_OTG5_LATCH_VALUE_BASE_IDX                                                         1