mmDCCG_GATE_DISABLE_CNTL_BASE_IDX  749 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL_BASE_IDX                                                              1
mmDCCG_GATE_DISABLE_CNTL_BASE_IDX  549 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL_BASE_IDX                                                              1
mmDCCG_GATE_DISABLE_CNTL_BASE_IDX  193 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL_BASE_IDX                                                              1
mmDCCG_GATE_DISABLE_CNTL_BASE_IDX  207 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL_BASE_IDX                                                              1