mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX  765 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX                                                             1
mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX  565 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX                                                             1
mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX  203 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX                                                             1
mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX  217 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_GATE_DISABLE_CNTL2_BASE_IDX                                                             1