mmDCCG_DISP_CNTL_REG_BASE_IDX  771 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCCG_DISP_CNTL_REG_BASE_IDX                                                                  1
mmDCCG_DISP_CNTL_REG_BASE_IDX  571 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_DISP_CNTL_REG_BASE_IDX                                                                  1
mmDCCG_DISP_CNTL_REG_BASE_IDX  209 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_DISP_CNTL_REG_BASE_IDX                                                                  1
mmDCCG_DISP_CNTL_REG_BASE_IDX  221 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_DISP_CNTL_REG_BASE_IDX                                                                  1