mmDCCG_DISP_CNTL_REG 1190 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCCG_DISP_CNTL_REG                                                    0x13f
mmDCCG_DISP_CNTL_REG 1002 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCCG_DISP_CNTL_REG                                                    0x13f
mmDCCG_DISP_CNTL_REG 1076 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCCG_DISP_CNTL_REG                                                    0x13f
mmDCCG_DISP_CNTL_REG  770 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCCG_DISP_CNTL_REG                                                                           0x007f
mmDCCG_DISP_CNTL_REG 1031 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDCCG_DISP_CNTL_REG                                                    0x13f
mmDCCG_DISP_CNTL_REG  570 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_DISP_CNTL_REG                                                                           0x007f
mmDCCG_DISP_CNTL_REG  208 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_DISP_CNTL_REG                                                                           0x007f
mmDCCG_DISP_CNTL_REG  220 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_DISP_CNTL_REG                                                                           0x007f