mmDCCG_CAC_STATUS_BASE_IDX  755 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCCG_CAC_STATUS_BASE_IDX                                                                     1
mmDCCG_CAC_STATUS_BASE_IDX  555 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCCG_CAC_STATUS_BASE_IDX                                                                     1
mmDCCG_CAC_STATUS_BASE_IDX  199 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCCG_CAC_STATUS_BASE_IDX                                                                     1
mmDCCG_CAC_STATUS_BASE_IDX  213 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCCG_CAC_STATUS_BASE_IDX                                                                     1