mmDB_RING_CONTROL_BASE_IDX 2817 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmDB_RING_CONTROL_BASE_IDX                                                                     0
mmDB_RING_CONTROL_BASE_IDX  909 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmDB_RING_CONTROL_BASE_IDX                                                                     0
mmDB_RING_CONTROL_BASE_IDX  879 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmDB_RING_CONTROL_BASE_IDX                                                                     0
mmDB_RING_CONTROL_BASE_IDX  845 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmDB_RING_CONTROL_BASE_IDX                                                                     0