mmDB_EQAA_BASE_IDX 6391 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmDB_EQAA_BASE_IDX                                                                             1
mmDB_EQAA_BASE_IDX 3997 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmDB_EQAA_BASE_IDX                                                                             1
mmDB_EQAA_BASE_IDX 4249 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmDB_EQAA_BASE_IDX                                                                             1
mmDB_EQAA_BASE_IDX 4201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmDB_EQAA_BASE_IDX                                                                             1