mmDB_DFSM_CONTROL_BASE_IDX 5733 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmDB_DFSM_CONTROL_BASE_IDX                                                                     1
mmDB_DFSM_CONTROL_BASE_IDX 3365 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmDB_DFSM_CONTROL_BASE_IDX                                                                     1
mmDB_DFSM_CONTROL_BASE_IDX 3617 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmDB_DFSM_CONTROL_BASE_IDX                                                                     1
mmDB_DFSM_CONTROL_BASE_IDX 3567 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmDB_DFSM_CONTROL_BASE_IDX                                                                     1