mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX  413 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX                                                     0
mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX  413 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX                                                     0
mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX  409 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_offset.h #define mmDAGB1_WR_OUTPUT_DAGB_LAZY_TIMER_BASE_IDX                                                     1