mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_BASE_IDX  205 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_2_0_0_offset.h #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_BASE_IDX                                                      0
mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_BASE_IDX  265 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_BASE_IDX                                                      0