mmD4VGA_CONTROL_BASE_IDX  643 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmD4VGA_CONTROL_BASE_IDX                                                                       1
mmD4VGA_CONTROL_BASE_IDX  453 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmD4VGA_CONTROL_BASE_IDX                                                                       1
mmD4VGA_CONTROL_BASE_IDX  121 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmD4VGA_CONTROL_BASE_IDX                                                                       1
mmD4VGA_CONTROL_BASE_IDX  141 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmD4VGA_CONTROL_BASE_IDX                                                                       1