mmD2VGA_CONTROL_BASE_IDX  577 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmD2VGA_CONTROL_BASE_IDX                                                                       1
mmD2VGA_CONTROL_BASE_IDX  411 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmD2VGA_CONTROL_BASE_IDX                                                                       1
mmD2VGA_CONTROL_BASE_IDX   55 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmD2VGA_CONTROL_BASE_IDX                                                                       1
mmD2VGA_CONTROL_BASE_IDX  117 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmD2VGA_CONTROL_BASE_IDX                                                                       1