mmCRTC0_CRTC_STATUS_HV_COUNT  485 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmCRTC0_CRTC_STATUS_HV_COUNT                                            0x1ba8
mmCRTC0_CRTC_STATUS_HV_COUNT  400 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmCRTC0_CRTC_STATUS_HV_COUNT                                            0x1ba8
mmCRTC0_CRTC_STATUS_HV_COUNT  407 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmCRTC0_CRTC_STATUS_HV_COUNT                                            0x1ba8
mmCRTC0_CRTC_STATUS_HV_COUNT 4136 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmCRTC0_CRTC_STATUS_HV_COUNT                                                                   0x06fb
mmCRTC0_CRTC_STATUS_HV_COUNT  536 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmCRTC0_CRTC_STATUS_HV_COUNT 0x1BA8
mmCRTC0_CRTC_STATUS_HV_COUNT  418 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmCRTC0_CRTC_STATUS_HV_COUNT                                            0x1ba8