mmCP_WAIT_SEM_ADDR_HI_BASE_IDX 7207 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_WAIT_SEM_ADDR_HI_BASE_IDX                                                                 1
mmCP_WAIT_SEM_ADDR_HI_BASE_IDX 4709 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_WAIT_SEM_ADDR_HI_BASE_IDX                                                                 1
mmCP_WAIT_SEM_ADDR_HI_BASE_IDX 4961 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_WAIT_SEM_ADDR_HI_BASE_IDX                                                                 1
mmCP_WAIT_SEM_ADDR_HI_BASE_IDX 4917 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_WAIT_SEM_ADDR_HI_BASE_IDX                                                                 1