mmCP_VMID_RESET_BASE_IDX 4925 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_VMID_RESET_BASE_IDX                                                                       0
mmCP_VMID_RESET_BASE_IDX 2565 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_VMID_RESET_BASE_IDX                                                                       0
mmCP_VMID_RESET_BASE_IDX 2857 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_VMID_RESET_BASE_IDX                                                                       0
mmCP_VMID_RESET_BASE_IDX 2791 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_VMID_RESET_BASE_IDX                                                                       0