mmCP_VIRT_STATUS_BASE_IDX 4689 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_VIRT_STATUS_BASE_IDX                                                                      0
mmCP_VIRT_STATUS_BASE_IDX 2320 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_VIRT_STATUS_BASE_IDX                                                                      0
mmCP_VIRT_STATUS_BASE_IDX 2619 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_VIRT_STATUS_BASE_IDX                                                                      0
mmCP_VIRT_STATUS_BASE_IDX 2557 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_VIRT_STATUS_BASE_IDX                                                                      0