mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX 7065 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX 4583 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX 4835 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX 4791 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX                                                             1