mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX 7087 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX 4605 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX 4857 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX 4813 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX                                                             1