mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX 7089 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX 4607 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX 4859 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX                                                             1
mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX 4815 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX                                                             1