mmCP_SIG_SEM_ADDR_HI_BASE_IDX 7201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_SIG_SEM_ADDR_HI_BASE_IDX                                                                  1
mmCP_SIG_SEM_ADDR_HI_BASE_IDX 4703 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_SIG_SEM_ADDR_HI_BASE_IDX                                                                  1
mmCP_SIG_SEM_ADDR_HI_BASE_IDX 4955 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_SIG_SEM_ADDR_HI_BASE_IDX                                                                  1
mmCP_SIG_SEM_ADDR_HI_BASE_IDX 4911 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_SIG_SEM_ADDR_HI_BASE_IDX                                                                  1