mmCP_SIG_SEM_ADDR_HI 7200 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_SIG_SEM_ADDR_HI                                                                           0x2071
mmCP_SIG_SEM_ADDR_HI 4702 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_SIG_SEM_ADDR_HI                                                                           0x2071
mmCP_SIG_SEM_ADDR_HI 4954 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_SIG_SEM_ADDR_HI                                                                           0x2071
mmCP_SIG_SEM_ADDR_HI 4910 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_SIG_SEM_ADDR_HI                                                                           0x2071
mmCP_SIG_SEM_ADDR_HI  545 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_SIG_SEM_ADDR_HI 0x2171
mmCP_SIG_SEM_ADDR_HI  445 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071
mmCP_SIG_SEM_ADDR_HI  457 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071
mmCP_SIG_SEM_ADDR_HI  495 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071
mmCP_SIG_SEM_ADDR_HI  495 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071