mmCP_ROQ_RB_STAT_BASE_IDX 2241 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_ROQ_RB_STAT_BASE_IDX                                                                      0
mmCP_ROQ_RB_STAT_BASE_IDX  237 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_ROQ_RB_STAT_BASE_IDX                                                                      0
mmCP_ROQ_RB_STAT_BASE_IDX  237 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_ROQ_RB_STAT_BASE_IDX                                                                      0
mmCP_ROQ_RB_STAT_BASE_IDX  231 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_ROQ_RB_STAT_BASE_IDX                                                                      0