mmCP_RB_WPTR_HI  4764 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB_WPTR_HI                                                                                0x1df5
mmCP_RB_WPTR_HI  2399 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_WPTR_HI                                                                                0x1055
mmCP_RB_WPTR_HI  2698 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_WPTR_HI                                                                                0x1055
mmCP_RB_WPTR_HI  2636 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_WPTR_HI                                                                                0x1055