mmCP_RB_WPTR     4760 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB_WPTR                                                                                   0x1df4
mmCP_RB_WPTR     2395 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_WPTR                                                                                   0x1054
mmCP_RB_WPTR     2694 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_WPTR                                                                                   0x1054
mmCP_RB_WPTR     2632 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_WPTR                                                                                   0x1054
mmCP_RB_WPTR      520 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_RB_WPTR 0x3045
mmCP_RB_WPTR      215 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB_WPTR                                                            0x3045
mmCP_RB_WPTR      215 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB_WPTR                                                            0x3045
mmCP_RB_WPTR      239 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB_WPTR                                                            0x3045
mmCP_RB_WPTR      240 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB_WPTR                                                            0x3045