mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX 4777 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX                                                          0
mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX 2412 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX                                                          0
mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX 2711 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX                                                          0
mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX 2649 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX                                                          0