mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX 2601 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX 2893 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX 2827 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX                                                        0