mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX 2597 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX 2889 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX 2823 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX                                                        0