mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX 2595 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX 2887 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX                                                        0
mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX 2821 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX                                                        0