mmCP_RB_CNTL     4710 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB_CNTL                                                                                   0x1de1
mmCP_RB_CNTL     2341 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB_CNTL                                                                                   0x1041
mmCP_RB_CNTL     2640 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB_CNTL                                                                                   0x1041
mmCP_RB_CNTL     2578 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB_CNTL                                                                                   0x1041
mmCP_RB_CNTL      513 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_RB_CNTL 0x3041
mmCP_RB_CNTL      202 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB_CNTL                                                            0x3041
mmCP_RB_CNTL      202 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB_CNTL                                                            0x3041
mmCP_RB_CNTL      226 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB_CNTL                                                            0x3041
mmCP_RB_CNTL      227 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB_CNTL                                                            0x3041