mmCP_RB0_WPTR 4758 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB0_WPTR 0x1df4 mmCP_RB0_WPTR 2393 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB0_WPTR 0x1054 mmCP_RB0_WPTR 2692 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB0_WPTR 0x1054 mmCP_RB0_WPTR 2630 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB0_WPTR 0x1054 mmCP_RB0_WPTR 499 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_RB0_WPTR 0x3045 mmCP_RB0_WPTR 214 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB0_WPTR 0x3045 mmCP_RB0_WPTR 214 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB0_WPTR 0x3045 mmCP_RB0_WPTR 238 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB0_WPTR 0x3045 mmCP_RB0_WPTR 239 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB0_WPTR 0x3045