mmCP_RB0_RPTR_ADDR_HI 4718 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB0_RPTR_ADDR_HI                                                                          0x1de4
mmCP_RB0_RPTR_ADDR_HI 2349 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB0_RPTR_ADDR_HI                                                                          0x1044
mmCP_RB0_RPTR_ADDR_HI 2648 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB0_RPTR_ADDR_HI                                                                          0x1044
mmCP_RB0_RPTR_ADDR_HI 2586 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB0_RPTR_ADDR_HI                                                                          0x1044
mmCP_RB0_RPTR_ADDR_HI  498 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_RB0_RPTR_ADDR_HI 0x3044
mmCP_RB0_RPTR_ADDR_HI  210 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044
mmCP_RB0_RPTR_ADDR_HI  210 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044
mmCP_RB0_RPTR_ADDR_HI  234 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044
mmCP_RB0_RPTR_ADDR_HI  235 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044