mmCP_RB0_CNTL    4708 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB0_CNTL                                                                                  0x1de1
mmCP_RB0_CNTL    2339 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB0_CNTL                                                                                  0x1041
mmCP_RB0_CNTL    2638 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB0_CNTL                                                                                  0x1041
mmCP_RB0_CNTL    2576 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB0_CNTL                                                                                  0x1041
mmCP_RB0_CNTL     495 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_RB0_CNTL 0x3041
mmCP_RB0_CNTL     201 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB0_CNTL                                                           0x3041
mmCP_RB0_CNTL     201 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB0_CNTL                                                           0x3041
mmCP_RB0_CNTL     225 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB0_CNTL                                                           0x3041
mmCP_RB0_CNTL     226 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB0_CNTL                                                           0x3041