mmCP_RB0_BUFSZ_MASK 4722 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB0_BUFSZ_MASK                                                                            0x1de5
mmCP_RB0_BUFSZ_MASK 2353 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB0_BUFSZ_MASK                                                                            0x1045
mmCP_RB0_BUFSZ_MASK 2652 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB0_BUFSZ_MASK                                                                            0x1045
mmCP_RB0_BUFSZ_MASK 2590 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB0_BUFSZ_MASK                                                                            0x1045