mmCP_RB0_BASE_HI 4920 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_RB0_BASE_HI                                                                               0x1e51
mmCP_RB0_BASE_HI 2560 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_RB0_BASE_HI                                                                               0x10b1
mmCP_RB0_BASE_HI 2852 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_RB0_BASE_HI                                                                               0x10b1
mmCP_RB0_BASE_HI 2786 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_RB0_BASE_HI                                                                               0x10b1
mmCP_RB0_BASE_HI  196 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_RB0_BASE_HI                                                        0x30b1
mmCP_RB0_BASE_HI  196 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_RB0_BASE_HI                                                        0x30b1
mmCP_RB0_BASE_HI  220 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_RB0_BASE_HI                                                        0x30b1
mmCP_RB0_BASE_HI  221 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_RB0_BASE_HI                                                        0x30b1