mmCP_PA_CPRIM_COUNT_LO_BASE_IDX 7075 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_PA_CPRIM_COUNT_LO_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_LO_BASE_IDX 4593 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_PA_CPRIM_COUNT_LO_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_LO_BASE_IDX 4845 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_PA_CPRIM_COUNT_LO_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_LO_BASE_IDX 4801 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_PA_CPRIM_COUNT_LO_BASE_IDX                                                                1