mmCP_PA_CPRIM_COUNT_HI_BASE_IDX 7077 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_PA_CPRIM_COUNT_HI_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_HI_BASE_IDX 4595 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_PA_CPRIM_COUNT_HI_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_HI_BASE_IDX 4847 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_PA_CPRIM_COUNT_HI_BASE_IDX                                                                1
mmCP_PA_CPRIM_COUNT_HI_BASE_IDX 4803 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_PA_CPRIM_COUNT_HI_BASE_IDX                                                                1