mmCP_MQD_BASE_ADDR_HI 5282 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_MQD_BASE_ADDR_HI 0x1faa mmCP_MQD_BASE_ADDR_HI 2794 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_MQD_BASE_ADDR_HI 0x1246 mmCP_MQD_BASE_ADDR_HI 3044 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_MQD_BASE_ADDR_HI 0x1246 mmCP_MQD_BASE_ADDR_HI 3000 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_MQD_BASE_ADDR_HI 0x1246 mmCP_MQD_BASE_ADDR_HI 568 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_MQD_BASE_ADDR_HI 0x3246 mmCP_MQD_BASE_ADDR_HI 581 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_MQD_BASE_ADDR_HI 0x3246 mmCP_MQD_BASE_ADDR_HI 631 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_MQD_BASE_ADDR_HI 0x3246 mmCP_MQD_BASE_ADDR_HI 631 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_MQD_BASE_ADDR_HI 0x3246