mmCP_MEC1_INSTR_PNTR 2190 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_MEC1_INSTR_PNTR                                                                           0x0f48
mmCP_MEC1_INSTR_PNTR  186 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_MEC1_INSTR_PNTR                                                                           0x01a8
mmCP_MEC1_INSTR_PNTR  186 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_MEC1_INSTR_PNTR                                                                           0x01a8
mmCP_MEC1_INSTR_PNTR  180 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_MEC1_INSTR_PNTR                                                                           0x01a8