mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX 4873 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX                                                           0
mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX 2513 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX                                                           0
mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX 2805 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX                                                           0
mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX 2739 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX                                                           0