mmCP_INT_STATUS_RING2_BASE_IDX 4815 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_INT_STATUS_RING2_BASE_IDX                                                                 0
mmCP_INT_STATUS_RING2_BASE_IDX 2452 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_INT_STATUS_RING2_BASE_IDX                                                                 0
mmCP_INT_STATUS_RING2_BASE_IDX 2751 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_INT_STATUS_RING2_BASE_IDX                                                                 0
mmCP_INT_STATUS_RING2_BASE_IDX 2689 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_INT_STATUS_RING2_BASE_IDX                                                                 0