mmCP_INT_STATUS_RING1 4812 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_INT_STATUS_RING1                                                                          0x1e0e
mmCP_INT_STATUS_RING1 2449 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_INT_STATUS_RING1                                                                          0x106e
mmCP_INT_STATUS_RING1 2748 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_INT_STATUS_RING1                                                                          0x106e
mmCP_INT_STATUS_RING1 2686 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_INT_STATUS_RING1                                                                          0x106e
mmCP_INT_STATUS_RING1  444 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_INT_STATUS_RING1 0x306E
mmCP_INT_STATUS_RING1  227 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_INT_STATUS_RING1                                                   0x306e
mmCP_INT_STATUS_RING1  227 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_INT_STATUS_RING1                                                   0x306e
mmCP_INT_STATUS_RING1  251 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_INT_STATUS_RING1                                                   0x306e
mmCP_INT_STATUS_RING1  252 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_INT_STATUS_RING1                                                   0x306e