mmCP_INT_CNTL_RING2 4808 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_INT_CNTL_RING2                                                                            0x1e0c
mmCP_INT_CNTL_RING2 2445 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_INT_CNTL_RING2                                                                            0x106c
mmCP_INT_CNTL_RING2 2744 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_INT_CNTL_RING2                                                                            0x106c
mmCP_INT_CNTL_RING2 2682 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_INT_CNTL_RING2                                                                            0x106c
mmCP_INT_CNTL_RING2  440 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_INT_CNTL_RING2 0x306C
mmCP_INT_CNTL_RING2  224 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_INT_CNTL_RING2                                                     0x306c
mmCP_INT_CNTL_RING2  224 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_INT_CNTL_RING2                                                     0x306c
mmCP_INT_CNTL_RING2  248 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_INT_CNTL_RING2                                                     0x306c
mmCP_INT_CNTL_RING2  249 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_INT_CNTL_RING2                                                     0x306c